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Tagged: Pic18, pic18f4620
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May 10, 2017 at 3:15 pm #13755YashParticipant
Hey guys,
I am working with PIC18F4620 micro in MPLAB with XC8 compiler below is the code I have written to initialize SPI. In the code i am trying to generate clock pluses by continuously sending 0xAA to the SPI output and I am simulating this code in PIC18 simulator, but I am not getting any signal on either of the pins (clk or the DO) and similarly I am also not getting any signal on the IC too. In simulation it is stuck at SSPSTAT –> BF waiting for it to go high and even if I set the flag high in simulation manually it still won’t generate any clock signal. There must be some silly mistake that I might have made please have a look.
Code
#include <xc.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <math.h>
#include <pic18f4620.h>
// PIC18F4620 Configuration Bit Settings
// CONFIG1H
#pragma config OSC = HSPLL // Oscillator Selection bits (HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1))
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (00C000-00FFFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (00C000-00FFFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
#define rs PORTDbits.RD6 //LATBbits.LB6
#define en PORTDbits.RD7 //LATBbits.LB7
#define _XTAL_FREQ 40000000
#define le PORTDbits.RD4 //bus bar control
#define watch 0b00000001
#define drain_valve 0b10000000
#define cal_led 0b01000000
#define level_sw PORTEbits.RE2
#define CS_PIN PORTCbits.RC2 //3 // Chip Select
#define TRIS_CS_PIN TRISCbits.TRISC2
#define DIN_PIN PORTCbits.RC4 // Data in
#define TRIS_DIN_PIN TRISCbits.TRISC4
#define DOUT_PIN PORTCbits.RC5 //6 // Data out
#define TRIS_DOUT_PIN TRISCbits.TRISC5
#define SCK_PIN PORTCbits.RC3 //5 // Clock
#define TRIS_SCK_PIN TRISCbits.TRISC3
void config_spi(void);
unsigned char write_spi(unsigned char mybyte);
unsigned char read_spi(void);
void main(){
TRISB =0x00; // lcd 0-7
TRISD =0x00; // D6, D7
TRISC = 0b10010011;
TRISE =0b101;
PORTEbits.RE1 = 0;
PORTB =0x00;
PORTD =0x00;
CS_PIN = 1; // Chip Select
ADCON0 = 0x00;
ADCON1 = 0b00001111; // all pins digital
unsigned char data=’a’;
config_spi();
while(1) write_spi(0xAA);
}
void config_spi(void){
TRIS_CS_PIN = 0;
TRIS_DIN_PIN = 1;
TRIS_DOUT_PIN = 0;
TRIS_SCK_PIN = 0;
SSPSTAT =0b10000000;
//SSPCON1 =0x22;
SSPCON1 = 0b00100010;
SSPADD =0x00;
CS_PIN = 0; // Chip Select
}
unsigned char write_spi(unsigned char mybyte){
SSPCON1bits.WCOL =0;
PIR1bits.SSPIF =0;
SSPBUF = mybyte;
//while(!SSPSTATbits.BF);
while(!PIR1bits.SSPIF);
return SSPBUF;
}
unsigned char read_spi(void){
while(!SSPSTATbits.BF);
return SSPBUF;
}
May 26, 2017 at 2:51 pm #13759YashParticipantPlease someone help !!
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